Logic Gates
Single-gate and small-scale CMOS logic for glue, level shifting, and signal conditioning.
What is it?
Logic gates are small ICs implementing one or two Boolean functions — AND, OR, NAND, NOR, XOR, NOT, buffer, Schmitt trigger. Used as 'glue logic' between larger devices: combining flags, inverting signals, debouncing inputs (Schmitt), or buffering long traces. Modern single-gate logic comes in tiny SOT-23-5 / SC-70 / SC-88 packages — much smaller than legacy quad-gate TSSOP packages.
When do you need it?
- Combining two interrupt sources into one MCU pin (OR).
- Inverting an active-high signal to active-low (NOT).
- Cleaning a noisy signal with Schmitt-trigger hysteresis.
- Driving a long high-fanout trace with a buffer.
- Level-shifting between 3.3 V and 5 V via single-gate logic with 5 V tolerance.
- Implementing simple state machines without burning MCU pins.
How to pick the right one
- Function
- AND, OR, NAND, NOR, XOR, NOT, buffer (1G125 = with 3-state), Schmitt buffer (1G17), single-supply level shifter (LV1T08, LV1T126).
- Technology family
- LVC: 1.65-5.5 V, fast (3-4 ns), high drive (24 mA). AUP: 0.8-3.6 V, low-power, lower drive. Pick LVC for 3.3 V/5 V general logic; pick AUP for sub-2 V battery-powered.
- Bits / channels
- 1G (single), 2G (dual), or 4G/6G (hex/quad legacy).
- Output type
- Push-pull (default), open-drain (07 type), or 3-state (125/126).
- VIH / VIL thresholds
- Match to driving signal's logic level — critical when feeding 3.3 V logic from a 1.8 V source.
What Magnias offers
Magnias ML74xxx logic family covers AUP (low-voltage) and LVC (general-purpose) families in SOT-23-5 / SOT-353 / SOT-23-6 / SOT-363 / SO-14 / TSSOP-14 packages. Highlights: ML74LVC1G07 (open-drain buffer), ML74LVC1G125/126 (3-state buffer), ML74LVC2G07 (dual open-drain), ML74LV1T08/126 (level-shifting buffer), and the full AUP1G series for sub-2 V applications.